Design Through Verilog HDL / T.R. Padmanabhan, and B. Bala Tripura Sundari.

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TextPublication details: Piscataway ; Hoboken : IEEE Press ; Wiley-Interscience, c 2004.Description: xiii, 455 p. : ills. ; 25 cmISBN:

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List(s) this item appears in: Department of EEE

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Holdings
Cover image	Item type	Current library	Home library	Collection	Shelving location	Call number	Materials specified	Vol info	URL	Copy number	Status	Notes	Date due	Barcode	Item holds	Item hold queue priority	Course reserves
	Book	Green University Library Reference		EEE		621.392 P136d (Browse shelf(Opens below))				1	Not For Laon			3020013388

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Includes index and bibliographical references (p. 449-450).

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